From 18d334c2ea62ecc9f059b786e1240ee68bc2ec45 Mon Sep 17 00:00:00 2001 From: hehaoyang Date: Wed, 8 May 2024 02:27:18 +0800 Subject: [PATCH] =?UTF-8?q?1.=20=E6=B7=BB=E5=8A=A0=20i2c-tools=E3=80=81can?= =?UTF-8?q?-utils=E3=80=81ifmetric=E3=80=81network-manager=E7=AD=89?= =?UTF-8?q?=E6=B5=8B=E8=AF=95=E5=B7=A5=E5=85=B7=E5=8C=85;=202.=20=E8=A7=A3?= =?UTF-8?q?=E5=86=B3QT=E7=95=8C=E9=9D=A2=E7=A8=8B=E5=BA=8F=E7=BC=96?= =?UTF-8?q?=E8=AF=91=E6=8A=A5=E9=94=99=E9=97=AE=E9=A2=98?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- external/libmali/meson.build | 4 + external/libmali/rockchip_egl/libEGL.so.1 | Bin 0 -> 7928 bytes .../devicetree/bindings/serial/rs485.txt | 1 + .../arm64/rockchip/rk3568-evb1-ddr4-v10.dtsi | 873 ++++++++++++++++++ kernel/drivers/tty/serial/8250/8250.h | 2 +- kernel/drivers/tty/serial/8250/8250_core.c | 4 +- kernel/drivers/tty/serial/8250/8250_dma.c | 6 +- kernel/drivers/tty/serial/8250/8250_dw.c | 3 + kernel/drivers/tty/serial/8250/8250_port.c | 123 ++- kernel/drivers/tty/serial/serial_core.c | 20 +- kernel/include/linux/serial_core.h | 4 +- .../recipes/hvgo-tvis/files/hvgo.c | 2 + .../packagegroups/packagegroup-tvis-app.bb | 1 - .../ubuntu-tool-tvis/files/canutils/candump | Bin 30856 -> 0 bytes .../ubuntu-tool-tvis/files/canutils/cangen | Bin 22664 -> 0 bytes .../ubuntu-tool-tvis/files/canutils/cansend | Bin 18560 -> 0 bytes .../ubuntu-tool-tvis/files/ifmetric/ifmetric | Bin 14264 -> 0 bytes .../ubuntu-tool-tvis/ubuntu-tool-tvis.bb | 28 - .../ubuntu-base/ubuntu-base_20.04.bb | 24 +- 19 files changed, 1036 insertions(+), 59 deletions(-) create mode 100644 external/libmali/rockchip_egl/libEGL.so.1 create mode 100644 kernel/arch/arm64/rockchip/rk3568-evb1-ddr4-v10.dtsi delete mode 100755 yocto/meta-tvis-app/recipes/ubuntu-tool-tvis/files/canutils/candump delete mode 100755 yocto/meta-tvis-app/recipes/ubuntu-tool-tvis/files/canutils/cangen delete mode 100755 yocto/meta-tvis-app/recipes/ubuntu-tool-tvis/files/canutils/cansend delete mode 100755 yocto/meta-tvis-app/recipes/ubuntu-tool-tvis/files/ifmetric/ifmetric delete mode 100755 yocto/meta-tvis-app/recipes/ubuntu-tool-tvis/ubuntu-tool-tvis.bb diff --git a/external/libmali/meson.build b/external/libmali/meson.build index b932ab5636..7cffdcc74d 100644 --- a/external/libmali/meson.build +++ b/external/libmali/meson.build @@ -277,6 +277,10 @@ if gpu == 'valhall-g610' install_data('firmware/g610/mali_csffw.bin', install_dir : '/lib/firmware') endif +#Use the RK3568 Linux libEGL. so. 1 library. Reason: Stable and Compatible. +rk368z_linux_egl = join_paths(meson.current_source_dir(), 'rockchip_egl') +run_command('cp', '-r', rk368z_linux_egl, meson.current_build_dir(), check : true) + if vendor_package # Install vendor ld config custom_target( diff --git a/external/libmali/rockchip_egl/libEGL.so.1 b/external/libmali/rockchip_egl/libEGL.so.1 new file mode 100644 index 0000000000000000000000000000000000000000..0bb1be35f955308aca59ec677f67546cb2cc902a GIT binary patch literal 7928 zcmeHMU2GiH6+XLT@`Dp+Q$h)(t=Az)6yb@TG?1i~vRVHumYl>GQ-NA(Jl!uwnY3>VfL()1z#sub>*YCJ7Z!>Uf>rZ$je(#SH9ZdwC3gWZZCW5f_UhoA|*K zsc;L>pxrbbF@Qk_D3L&fo&$N$WQ4C##tui|Vx5e@CErmvS=L;+TCwVmU2`mptg)$c zRxV%5&lT%VzBYAks8p@wr|g+h-jhX3tn8v~%@!+msrYoBO2wHn_pCy-deN*`%|Su3 z(tAjHBbjjz&5Vzwhpc1f;KOv}!sJ+H?EFzNISs}%k5=cMVwrtf$B)`}En9f#Tm7YC zWnr;@uClQ8npli7Co!610oKQr%fI01jnj`*8SCEA{IBT5zoP3KcuH~12XOFj?~_dP zcpWdYL=gmv6|9;b;%Xbnzzj^76 zt80e!5#ril*$UCh{+pRb;%{dzC*!>zi47i>t?rMf8i_c$GMC@M{9%t@W?T9!(?}7$ z+-NrM65oui(llNE3DZ8NXNdl>Ml{9zO5dlMhRwPgM(icxv7+?*h~7=p^80;X3_aJk z=gk-2VEt#Bw|Kw(~IiPaU6Te?D_8rBNOjGF46(fBE=>9)ZLz$Ik@o_}78Rw%c|FwllDuf$a=zXJ9)6Uv36a7orY~sr$#3 zf|puTn)_qT^an0Sv`^`?O7|#5-LJeR1=Ux<5#s5LiKe!Kd6RcW_U97j>(u4}!jZV2_w0o9i?m9)D&LIWBY@MqN# z-s`IB?N*BMxJ+{6FQ`73KQ52FZz%s=m2*w%$`Pl!`_f43-1~oeT-H2*;vA6~8akc4 zKfO>aLSr_#A}w5X23_Itb!jg!K}{ZzJSAi0>fGR}kMxnD-#QtF=CYc&GF6?S%XV^}Ad5 zC_#KrYkvjty{-F+Al^gQu~B>igLgCbr4QzFUxKh7gZO^FH^EBXk{I+ATGRcrh06Ky z4#K_);_deVA~)zxI+%#^|5d-a+ZU}a`n(wyc>AwCZ?f;>w1s0|d;0D3;^FOimVMlL z+}$*f50(Z7Kfej(zxS4Yy6MA^p9eJlFfL~=d9SXJe?GHvYtM69_3{08)%ed7{KS0u z$1He$+SfzQ)o;gt#<;|T-x+4z=J{z~Z&z3vi&%%Aeh+;X`CjeoIf;P5|= z9}G82qSxGbdMJ#GILiNfjK`^coxJb*Y0v*(UHtQAcpt4ZPSn1C|Ly7@XxkS%d4giR z{=@t3>x{=E?%}+3*#4clm-Uk}bf}$S{BQ^p_Q?+Vg$_7nYfjOu(vd~V+NF~9RNlU5 z%~k}iFwCUxEX>ZDS=zdsvz)S(mFu}W9m(-UUao4*m8vs#$;vs^THUf2*jcqaU&=fA z9RF-YYRIi!(Xwkbd&$aIoZ1r2*6ecL$}N=3OKjrfEY@@as;&~pWLcw=XU~mTBj<dYq6Uu)Pcp=}j4;iNUr3)Fw=Rs1J~lFC zO`T1TkFY}-_|{jGfeXl#?_x3Pelzk8lg#>3*|BGsIyH|L(BsQSvtZW?WagGCtmaXt zMy5!9n6K4~)k=V|SXRrIY%$Q@e90lxeG}8kFLK{albJ7Qjte=q0q1FY$@VnSXNPvV znB~!`?1TT9uH&5T*ksPs>tynrmw759R^|T=$#+3MEvWZUSAeF}CF(A3|HwDMYf{Jl zi)%C3U*q*J4HR{3*xu73x{o{FZ<2>>s6FUaRh03>2gXMo*{?XpM?C|IdRN`>w<6e1 zFe|ku>{0iCqV7lh&;w1gz0|VcQ6GUObvTJ%#zy=K)1%xG8SGIu zLmKMw7WH5^cXx0DS|=71 +#include +#include +#include "rk3568.dtsi" +#include "rk3568-evb.dtsi" + +/ { + model = "Rockchip RK3568 EVB1 DDR4 V10 Board"; + compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568"; + + rk_headset: rk-headset { + compatible = "rockchip_headset"; + //headset_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + //pinctrl-names = "default"; + //pinctrl-0 = <&hp_det>; + }; + + vcc2v5_sys: vcc2v5-ddr { + compatible = "regulator-fixed"; + regulator-name = "vcc2v5-sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + vin-supply = <&vcc3v3_sys>; + }; + + /*vcc3v3_vga: vcc3v3-vga { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_vga"; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vcc3v3_sys>; + };*/ + + pcie30_avdd0v9: pcie30-avdd0v9 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + vin-supply = <&vcc3v3_sys>; + }; + + pcie30_avdd1v8: pcie30-avdd1v8 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc3v3_sys>; + }; + + vcc3v3_pcie: gpio-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>; + startup-delay-us = <5000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc3v3_bu: vcc3v3-bu { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_bu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc_camera: vcc-camera-regulator { + compatible = "regulator-fixed"; +// gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; +// pinctrl-names = "default"; +// pinctrl-0 = <&camera_pwr>; + regulator-name = "vcc_camera"; + enable-active-high; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc3v3_sys>; + }; + + /*vcc_dvdd: vcc-dvdd { + compatible = "regulator-fixed"; + regulator-name = "vcc_dvdd"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc_dvdd_en>; + vin-supply = <&vcc3v3_sys>; + };*/ + /*vcc_avdd: vcc-avdd { + compatible = "regulator-fixed"; + regulator-name = "vcc_avdd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc_avdd_en>; + vin-supply = <&vcc3v3_sys>; + };*/ + /*vcc_iovdd: vcc-iovdd { + compatible = "regulator-fixed"; + regulator-name = "vcc_iovdd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc_iovdd_en>; + vin-supply = <&vcc3v3_sys>; + };*/ + vcc_rtl8821chipen: vcc-rtl8821chipen { + compatible = "regulator-fixed"; + regulator-name = "chipen-rtl8821"; + enable-active-high; + regulator-always-on; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_chipen_rtl8821>; + gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + vcc_rtl8821power:vcc-rtl8821power { + compatible = "regulator-fixed"; + regulator-name = "power-rtl8821"; + enable-active-high; + regulator-always-on; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_power_rtl8821>; + gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + vcc_5Gpower:vcc_5Gpower { + compatible = "regulator-fixed"; + regulator-name = "out5G_power"; + enable-active-high; + regulator-always-on; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_5G_power>; + gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + txrx_485ctl_enable:txrx_485ctl_enable { + compatible = "regulator-fixed"; + regulator-name = "txrx_485ctl_enable"; + enable-active-low; + regulator-always-on; + //pinctrl-names = "default"; + //pinctrl-0 = <&txrx_485_enable>; + //gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + + tws_gpio:tws_gpio { + compatible = "quec,gpio_driver"; + tws,led_crtl2 = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>; + tws,led_crtl3 = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; + tws,led_crtl4 = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; + tws,led_crtl5 = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; + tws,led_crtl6 = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; + tws,led_crtl7 = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; + tws,led_crtl8 = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; + tws,relay_gpio1_d2 = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; + tws,relay_gpio1_d4 = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&tws_led_ctrl>; + status = "okay"; + }; +}; + +&combphy0_us { + status = "okay"; +}; + +&combphy1_usq { + status = "okay"; +}; + +&combphy2_psq { + status = "okay"; +}; + +&csi2_dphy_hw { + status = "okay"; +}; + +&csi2_dphy0 { + status = "okay"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_in_ucam0: endpoint@1 { + reg = <1>; + remote-endpoint = <&ucam_out0>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + csidphy_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_csi2_input>; + }; + }; + }; +}; + +/*&csi2_dphy1 { + status = "okay"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + dphy1_in: endpoint@1 { + reg = <1>; + remote-endpoint = <&cam_out0>; + data-lanes = <1 2>; + }; + }; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + dphy1_out: endpoint@1 { + reg = <1>; + remote-endpoint = <&isp0_in>; + }; + }; + }; +};*/ + +/*&csi2_dphy2 { + status = "okay"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + dphy2_in: endpoint@1 { + reg = <1>; + remote-endpoint = <&cam_out1>; + data-lanes = <1 2>; + }; + }; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + dphy2_out: endpoint@1 { + reg = <1>; + remote-endpoint = <&mipi_csi2_input>; + }; + }; + }; +};*/ + +&mipi_csi2 { + status = "okay"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + mipi_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidphy_out>; + data-lanes = <1 2 3 4>; + }; + }; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + mipi_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi_in>; + data-lanes = <1 2 3 4>; + }; + }; + + }; +}; + +&rkcif_mipi_lvds { + status = "okay"; + //rockchip,cif-monitor = <1 2 60 1000 5>; //加这个复位机制测试 + //rockchip,cif-monitor = <3 200 10 1000 0>; + rockchip,cif-monitor = <2 2 5 1000 5>; + port { + cif_mipi_in: endpoint { + remote-endpoint = <&mipi_csi2_output>; + data-lanes = <1 2 3 4>; + }; + }; +}; + +&rkcif_mipi_lvds_sditf { + status = "okay"; + port { + mipi_lvds_sditf: endpoint { + remote-endpoint = <&isp_in>; + data-lanes = <1 2 3 4>; + }; + }; +}; + + +/* + * video_phy0 needs to be enabled + * when dsi0 is enabled + */ + +&vop { + status = "okay"; + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>, <&cru DCLK_VOP2>; + assigned-clocks-parents = <&cru PLL_VPLL>, <&pmucru PLL_HPLL>, <&cru PLL_GPLL>; +}; + +&vp0 { + rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_SMART1)>; + rockchip,primary-plane = ; +}; + +&vp1 { + rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 1 << ROCKCHIP_VOP2_SMART0)>; + rockchip,primary-plane = ; +}; + +&vp2 { + rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_ESMART1)>; + rockchip,primary-plane = ; +}; + +&dsi0 { + status = "disabled"; +}; + +&dsi0_in_vp0 { + status = "disabled"; +}; + +&dsi0_in_vp1 { + status = "disabled"; +}; + +/* + * video_phy1 needs to be enabled + * when dsi1 is enabled + */ +&dsi1 { + status = "disabled"; +}; + +&dsi1_in_vp0 { + status = "disabled"; +}; + +&dsi1_in_vp1 { + status = "odisabled"; +}; +&dsi1_in_vp2{ + status = "disabled"; +}; + +&route_dsi1 { + status = "disabled"; + connect = <&vp1_out_dsi1>; +}; + +&route_hdmi { + status = "okay"; + connect = <&vp1_out_hdmi>; +}; + +&route_lvds { + status = "disabled"; + connect = <&vp2_out_lvds>; +}; + +&route_edp { + status = "okay"; + connect = <&vp0_out_edp>; +}; + +&lvds_in_vp2 { + status = "disabled"; +}; + +&lvds{ + status = "disabled"; +}; + +&edp { + force-hpd; + //hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&edp_phy { + status = "okay"; +}; + +&edp_in_vp0 { + status = "okay"; +}; + +&edp_in_vp1 { + status = "disabled"; +}; + +&gmac0 { + phy-mode = "rgmii"; + clock_in_out = "output"; + + snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; + snps,reset-active-high; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; + assigned-clock-rates = <0>, <125000000>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + + tx_delay = <0x3c>; + rx_delay = <0x2f>; + + phy-handle = <&rgmii_phy0>; + status = "disabled"; +}; + +&gmac1 { + phy-mode = "rgmii"; + clock_in_out = "output"; + + snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; + snps,reset-active-high; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; + assigned-clock-rates = <0>, <125000000>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus>; + + tx_delay = <0x4f>; + rx_delay = <0x26>; + + phy-handle = <&rgmii_phy1>; + status = "ok"; +}; + +/* + * power-supply should switche to vcc3v3_lcd1_n + * when mipi panel is connected to dsi1. + */ +>1x { + status = "okay"; + power-supply = <&vcc3v3_lcd0_n>; +}; + +&i2c4 { + status = "okay"; + pinctrl-0 = <&i2c4m1_xfer>; + pericom_30216c:pericom_30216c@1D { + status = "okay"; + compatible = "pericom,30216c"; + reg = <0x1D>; + pinctrl-names = "default"; + pinctrl-0 = <&prm_30216_gpio>; + interrupt-parent = <&gpio0>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; + swcc-gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; + }; + rtc@32 { + reg = <0x32>; + compatible = "epson,rx8130"; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&rx8130_gpio>; + //int-gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; + }; + hym8563: hym8563@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_int>; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "xin32k"; + }; + gt911@14 { + compatible = "goodix,gt9xx"; + reg = <0x14>; + + pinctrl-names = "default"; + pinctrl-0 = <>911_gpio>; + touch-gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //int IO + reset-gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //reset io + max-x = <800>; //x size + max-y = <1280>; //y size + tp-size = <911>; //TP model + status = "okay"; + }; +}; + +&mdio0 { + rgmii_phy0: phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&mdio1 { + rgmii_phy1: phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&video_phy0 { + status = "okay"; +}; + +&video_phy1 { + status = "okay"; +}; + +&pcie30phy { + status = "okay"; +}; + +&pcie3x1 { + rockchip,bifurcation; + reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie>; + pinctrl-names = "default"; + pinctrl-0 = <&rtl8111_isolate>;//isolate脚 需要硬件拉高 + status = "okay"; +}; + +&pcie3x2 { + rockchip,bifurcation; + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; + quectel,5Gmodule; + reset5G-gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; +}; + +&pinctrl { + gpio-rtl8821 { + gpio_chipen_rtl8821: gpio-chipen-rtl8821 { + rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + gpio_power_rtl8821:gpio-power-rtl8821 { + rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + gpio-5Gpower { + gpio_5G_power:gpio-5G-power { + rockchip,pins = <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + gpio-485enable { + txrx_485_enable:txrx_485_enable { + rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + pericom_30216c { + prm_30216_gpio:prm-30216-gpio { + rockchip,pins = + <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, + <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + gt911 { + gt911_gpio:gt911-gpio { + rockchip,pins = + <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, + <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rx8130_gpio { + rx8130_gpio:rx8130_gpio{ + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + cam_en { + camera_pwr: camera-pwr { + rockchip,pins = + /* camera power en */ + <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc_iovdd_en: vcc-iovdd-en { + rockchip,pins = + /* camera power en */ + <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc_dvdd_en: vcc-dvdd-en { + rockchip,pins = + /* camera power en */ + <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc_avdd_en: vcc-avdd-en { + rockchip,pins = + /* camera power en */ + <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + headphone { + hp_det: hp-det { + //peeta + rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + wireless-wlan { + wifi_host_wake_irq: wifi-host-wake-irq { + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + wireless-bluetooth { + uart1_gpios: uart1-gpios { + rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rtl8111 { + rtl8111_isolate: ertl8111-isolate { + rockchip,pins = <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;//这里需要配置isolate引脚，默认pull up + }; + }; + + tws_gpio_ctrl { + tws_led_ctrl:tws_led_ctrl { + rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, + <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, + <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rtc { + rtc_int: rtc-int { + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + uart7_rts { + uart7_rts_gpio:uart7_rts_gpio { + rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +/*&rkcif { + status = "okay"; +}; + +&rkcif_mmu { + status = "okay"; +};*/ + +&rkisp { + status = "okay"; + /* the max input w h and fps of mulit sensor */ + //max-input = <3264 2448 30>; +}; + +&rkisp_mmu { + status = "okay"; +}; + +&rkisp_vir0 { + status = "okay"; + /* s5k4h7->csi2_dphy1->isp_vir0 */ + port { + #address-cells = <1>; + #size-cells = <0>; + + isp_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds_sditf>; + }; + }; +}; + +/*&rkisp_vir1 { + status = "okay";*/ + /* s5k4h7_cam2->csi2_dphy2->csi2->vicap */ + /* vicap sditf->isp_vir1 */ + /*port { + #address-cells = <1>; + #size-cells = <0>; + isp1_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds_sditf>; + }; + }; +};*/ + +&route_dsi0 { + status = "disabled"; + connect = <&vp1_out_dsi0>; +}; + +&sata1 { + status = "okay"; +}; + +&sata2 { + status = "okay"; +}; + +&sdmmc1 { + max-frequency = <150000000>; + supports-sdio; + bus-width = <4>; + //disable-wp; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; + sd-uhs-sdr104; + status = "okay"; +}; + +&spdif_8ch { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&spdifm1_tx>; +}; + +&uart3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart3m1_xfer>; +}; + +&uart4 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart4m1_xfer>; +}; + +&uart5 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart5m1_xfer>; +}; + +&uart7 { + status = "okay"; + pinctrl-names = "default"; + //pinctrl-0 = <&uart7m1_xfer &uart7_rts_gpio>; + pinctrl-0 = <&uart7m1_xfer>; + rs485-de-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; + linux,rs485-enabled-at-boot-time; +}; + +&uart8 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart8m1_xfer>; +}; + +&uart1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; +}; + +&vcc3v3_lcd0_n { + //gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + enable-active-high; +}; + +&vcc3v3_lcd1_n { + //gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + enable-active-high; +}; + +&wireless_wlan { + pinctrl-names = "default"; + pinctrl-0 = <&wifi_host_wake_irq>; + WIFI,host_wake_irq = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; +}; + +&wireless_bluetooth { + compatible = "bluetooth-platdata"; + clocks = <&rk809 1>; + clock-names = "ext_clock"; + //wifi-bt-power-toggle; + uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "rts_gpio"; + pinctrl-0 = <&uart1m0_rtsn>; + pinctrl-1 = <&uart1_gpios>; + BT,reset_gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + //BT,wake_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>; + //BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; diff --git a/kernel/drivers/tty/serial/8250/8250.h b/kernel/drivers/tty/serial/8250/8250.h index 7c19addb64..817dd311b9 100644 --- a/kernel/drivers/tty/serial/8250/8250.h +++ b/kernel/drivers/tty/serial/8250/8250.h @@ -139,7 +139,7 @@ void serial8250_rpm_put(struct uart_8250_port *p); void serial8250_rpm_get_tx(struct uart_8250_port *p); void serial8250_rpm_put_tx(struct uart_8250_port *p); -int serial8250_em485_init(struct uart_8250_port *p); +int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485); void serial8250_em485_destroy(struct uart_8250_port *p); static inline void serial8250_out_MCR(struct uart_8250_port *up, int value) diff --git a/kernel/drivers/tty/serial/8250/8250_core.c b/kernel/drivers/tty/serial/8250/8250_core.c index 4e1d450ffd..a273d9b257 100644 --- a/kernel/drivers/tty/serial/8250/8250_core.c +++ b/kernel/drivers/tty/serial/8250/8250_core.c @@ -1017,8 +1017,10 @@ int serial8250_register_8250_port(struct uart_8250_port *up) if (uart->port.fifosize && !uart->tx_loadsz) uart->tx_loadsz = uart->port.fifosize; - if (up->port.dev) + if (up->port.dev) { uart->port.dev = up->port.dev; + uart_get_rs485_mode(&uart->port); + } if (up->port.flags & UPF_FIXED_TYPE) uart->port.type = up->port.type; diff --git a/kernel/drivers/tty/serial/8250/8250_dma.c b/kernel/drivers/tty/serial/8250/8250_dma.c index 141a5b03be..27cab1f9fa 100644 --- a/kernel/drivers/tty/serial/8250/8250_dma.c +++ b/kernel/drivers/tty/serial/8250/8250_dma.c @@ -43,7 +43,8 @@ static void __dma_tx_complete(void *param) if (ret) { p->ier |= UART_IER_THRI; #ifdef CONFIG_ARCH_ROCKCHIP - p->ier |= UART_IER_PTIME; + if (!p->em485) + p->ier |= UART_IER_PTIME; #endif serial_port_out(&p->port, UART_IER, p->ier); } @@ -152,7 +153,8 @@ int serial8250_tx_dma(struct uart_8250_port *p) if (p->ier & UART_IER_THRI) { p->ier &= ~UART_IER_THRI; #ifdef CONFIG_ARCH_ROCKCHIP - p->ier &= ~UART_IER_PTIME; + if (!p->em485) + p->ier &= ~UART_IER_PTIME; #endif serial_out(p, UART_IER, p->ier); } diff --git a/kernel/drivers/tty/serial/8250/8250_dw.c b/kernel/drivers/tty/serial/8250/8250_dw.c index 2882547b85..04a29680c2 100644 --- a/kernel/drivers/tty/serial/8250/8250_dw.c +++ b/kernel/drivers/tty/serial/8250/8250_dw.c @@ -572,6 +572,9 @@ static int dw8250_probe(struct platform_device *pdev) p->serial_out = dw8250_serial_out; p->set_ldisc = dw8250_set_ldisc; p->set_termios = dw8250_set_termios; +#if defined(CONFIG_ARCH_ROCKCHIP) + p->rs485_config = serial8250_em485_config; +#endif p->membase = devm_ioremap(dev, regs->start, resource_size(regs)); if (!p->membase) diff --git a/kernel/drivers/tty/serial/8250/8250_port.c b/kernel/drivers/tty/serial/8250/8250_port.c index 39156ecbeb..8547a0d41b 100644 --- a/kernel/drivers/tty/serial/8250/8250_port.c +++ b/kernel/drivers/tty/serial/8250/8250_port.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -60,6 +61,12 @@ #define DEBUG_AUTOCONF(fmt...) do { } while (0) #endif +#if 0 +#define DEBUG_EM485(fmt...) printk(fmt) +#else +#define DEBUG_EM485(fmt...) do { } while (0) +#endif + #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) /* @@ -567,13 +574,27 @@ static void serial8250_clear_fifos(struct uart_8250_port *p) static inline void serial8250_em485_rts_after_send(struct uart_8250_port *p) { + struct uart_port *port = &p->port; unsigned char mcr = serial8250_in_MCR(p); + int value = 0; + + if (port->rs485_de_gpio) { + if (p->port.rs485.flags & SER_RS485_RTS_AFTER_SEND) + value = 0; + else + value = 1; + + gpiod_set_value(port->rs485_de_gpio, value); + DEBUG_EM485("%s ttyS%d gpio:%d\n", __func__, p->port.line, value); + return; + } if (p->port.rs485.flags & SER_RS485_RTS_AFTER_SEND) mcr |= UART_MCR_RTS; else mcr &= ~UART_MCR_RTS; serial8250_out_MCR(p, mcr); + DEBUG_EM485("%s ttyS%d mcr:%02x\n", __func__, up->port.line, mcr); } static enum hrtimer_restart serial8250_em485_handle_start_tx(struct hrtimer *t); @@ -623,8 +644,10 @@ EXPORT_SYMBOL_GPL(serial8250_rpm_put); * * Return 0 - success, -errno - otherwise */ -int serial8250_em485_init(struct uart_8250_port *p) +static int serial8250_em485_init(struct uart_8250_port *p) { + DEBUG_EM485("%s ttyS%d\n", __func__, p->port.line); + if (p->em485) return 0; @@ -644,7 +667,6 @@ int serial8250_em485_init(struct uart_8250_port *p) return 0; } -EXPORT_SYMBOL_GPL(serial8250_em485_init); /** * serial8250_em485_destroy() - put uart_8250_port into normal state @@ -672,6 +694,45 @@ void serial8250_em485_destroy(struct uart_8250_port *p) } EXPORT_SYMBOL_GPL(serial8250_em485_destroy); +/** + * serial8250_em485_config() - generic ->rs485_config() callback + * @port: uart port + * @rs485: rs485 settings + * + * Generic callback usable by 8250 uart drivers to activate rs485 settings + * if the uart is incapable of driving RTS as a Transmit Enable signal in + * hardware, relying on software emulation instead. + */ +int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485) +{ + struct uart_8250_port *up = up_to_u8250p(port); + + /* clamp the delays to [0, 100ms] */ + rs485->delay_rts_before_send = min(rs485->delay_rts_before_send, 100U); + rs485->delay_rts_after_send = min(rs485->delay_rts_after_send, 100U); + + port->rs485 = *rs485; + DEBUG_EM485("%s ttyS%d\n", __func__, port->line); + + /* + * Both serial8250_em485_init() and serial8250_em485_destroy() + * are idempotent. + */ + if (rs485->flags & SER_RS485_ENABLED) { + int ret = serial8250_em485_init(up); + + if (ret) { + rs485->flags &= ~SER_RS485_ENABLED; + port->rs485.flags &= ~SER_RS485_ENABLED; + } + return ret; + } + + serial8250_em485_destroy(up); + return 0; +} +EXPORT_SYMBOL_GPL(serial8250_em485_config); + /* * These two wrappers ensure that enable_runtime_pm_tx() can be called more than * once and disable_runtime_pm_tx() will still disable RPM because the fifo is @@ -1447,6 +1508,7 @@ static void serial8250_stop_rx(struct uart_port *port) static void __do_stop_tx_rs485(struct uart_8250_port *p) { + DEBUG_EM485("%s ttyS%d\n", __func__, p->port.line); serial8250_em485_rts_after_send(p); /* @@ -1490,20 +1552,23 @@ static void start_hrtimer_ms(struct hrtimer *hrt, unsigned long msec) hrtimer_start(hrt, t, HRTIMER_MODE_REL); } -static void __stop_tx_rs485(struct uart_8250_port *p) +static void __stop_tx_rs485(struct uart_8250_port *p, u64 stop_delay) { struct uart_8250_em485 *em485 = p->em485; + DEBUG_EM485("%s ttyS%d\n", __func__, p->port.line); + stop_delay += (u64)p->port.rs485.delay_rts_after_send * NSEC_PER_MSEC; + /* * __do_stop_tx_rs485 is going to set RTS according to config * AND flush RX FIFO if required. */ - if (p->port.rs485.delay_rts_after_send > 0) { + if (stop_delay > 0) { em485->active_timer = &em485->stop_tx_timer; - start_hrtimer_ms(&em485->stop_tx_timer, - p->port.rs485.delay_rts_after_send); + hrtimer_start(&em485->stop_tx_timer, ns_to_ktime(stop_delay), HRTIMER_MODE_REL); } else { __do_stop_tx_rs485(p); + em485->active_timer = NULL; } } @@ -1512,7 +1577,8 @@ static inline void __do_stop_tx(struct uart_8250_port *p) if (p->ier & UART_IER_THRI) { p->ier &= ~UART_IER_THRI; #ifdef CONFIG_ARCH_ROCKCHIP - p->ier &= ~UART_IER_PTIME; + if (!p->em485) + p->ier &= ~UART_IER_PTIME; #endif serial_out(p, UART_IER, p->ier); serial8250_rpm_put_tx(p); @@ -1525,18 +1591,25 @@ static inline void __stop_tx(struct uart_8250_port *p) if (em485) { unsigned char lsr = serial_in(p, UART_LSR); - /* - * To provide required timeing and allow FIFO transfer, - * __stop_tx_rs485() must be called only when both FIFO and - * shift register are empty. It is for device driver to enable - * interrupt on TEMT. - */ - if ((lsr & BOTH_EMPTY) != BOTH_EMPTY) + u64 stop_delay = 0; + + p->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS; + + if (!(lsr & UART_LSR_THRE)) return; - em485->active_timer = NULL; + /* + * To provide required timing and allow FIFO transfer, + * __stop_tx_rs485() must be called only when both FIFO and + * shift register are empty. The device driver should either + * enable interrupt on TEMT or set UART_CAP_NOTEMT that will + * enlarge stop_tx_timer by the tx time of one frame to cover + * for emptying of the shift register. + */ + if (!(lsr & UART_LSR_TEMT)) + stop_delay = p->port.frame_time + 2000; - __stop_tx_rs485(p); + __stop_tx_rs485(p, stop_delay); } __do_stop_tx(p); } @@ -1573,7 +1646,9 @@ static inline void __start_tx(struct uart_port *port) if (!(up->ier & UART_IER_THRI)) { up->ier |= UART_IER_THRI; #ifdef CONFIG_ARCH_ROCKCHIP - up->ier |= UART_IER_PTIME; + /* Disable PTIME when it is rs485 mode*/ + if (!up->em485) + up->ier |= UART_IER_PTIME; #endif serial_port_out(port, UART_IER, up->ier); @@ -1601,12 +1676,24 @@ static inline void start_tx_rs485(struct uart_port *port) struct uart_8250_port *up = up_to_u8250p(port); struct uart_8250_em485 *em485 = up->em485; unsigned char mcr; + int value = 0; if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) serial8250_stop_rx(&up->port); em485->active_timer = NULL; + if (port->rs485_de_gpio) { + if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND) + value = 0; + else + value = 1; + gpiod_set_value(port->rs485_de_gpio, value); + DEBUG_EM485("%s ttyS%d gpio:%d\n", __func__, port->line, value); + __start_tx(port); + return; + } + mcr = serial8250_in_MCR(up); if (!!(up->port.rs485.flags & SER_RS485_RTS_ON_SEND) != !!(mcr & UART_MCR_RTS)) { @@ -1615,6 +1702,7 @@ static inline void start_tx_rs485(struct uart_port *port) else mcr &= ~UART_MCR_RTS; serial8250_out_MCR(up, mcr); + DEBUG_EM485("%s:%d ttyS%d MCR:%02X\n", __func__, __LINE__, port->line, mcr); if (up->port.rs485.delay_rts_before_send > 0) { em485->active_timer = &em485->start_tx_timer; @@ -1778,6 +1866,7 @@ unsigned char serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr) lsr = serial_in(up, UART_LSR); } while (lsr & (UART_LSR_DR | UART_LSR_BI)); + serial8250_out_MCR(up, 2); tty_flip_buffer_push(&port->state->port); return lsr; } diff --git a/kernel/drivers/tty/serial/serial_core.c b/kernel/drivers/tty/serial/serial_core.c index fc1c7d5f10..aec3c61b9a 100644 --- a/kernel/drivers/tty/serial/serial_core.c +++ b/kernel/drivers/tty/serial/serial_core.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -25,6 +26,7 @@ #include #include +#include /* * This is used to lock changes in serial line configuration. @@ -332,6 +334,7 @@ uart_update_timeout(struct uart_port *port, unsigned int cflag, unsigned int baud) { unsigned int bits; + u64 frame_time; /* byte size and parity */ switch (cflag & CSIZE) { @@ -354,6 +357,8 @@ uart_update_timeout(struct uart_port *port, unsigned int cflag, if (cflag & PARENB) bits++; + frame_time = (u64)bits * NSEC_PER_SEC; + /* * The total number of bits to be transmitted in the fifo. */ @@ -364,6 +369,7 @@ uart_update_timeout(struct uart_port *port, unsigned int cflag, * Add .02 seconds of slop */ port->timeout = (HZ * bits) / baud + HZ/50; + port->frame_time = DIV64_U64_ROUND_UP(frame_time, baud); } EXPORT_SYMBOL(uart_update_timeout); @@ -2336,7 +2342,10 @@ uart_configure_port(struct uart_driver *drv, struct uart_state *state, */ spin_lock_irqsave(&port->lock, flags); port->mctrl &= TIOCM_DTR; - port->ops->set_mctrl(port, port->mctrl); + if (!(port->rs485.flags & SER_RS485_ENABLED)) + port->ops->set_mctrl(port, port->mctrl); + else + port->rs485_config(port, &port->rs485); spin_unlock_irqrestore(&port->lock, flags); /* @@ -3066,8 +3075,10 @@ EXPORT_SYMBOL(uart_remove_one_port); * This function implements the device tree binding described in * Documentation/devicetree/bindings/serial/rs485.txt. */ -void uart_get_rs485_mode(struct device *dev, struct serial_rs485 *rs485conf) +void uart_get_rs485_mode(struct uart_port *port) { + struct serial_rs485 *rs485conf = &port->rs485; + struct device *dev = port->dev; u32 rs485_delay[2]; int ret; @@ -3099,6 +3110,11 @@ void uart_get_rs485_mode(struct device *dev, struct serial_rs485 *rs485conf) rs485conf->flags &= ~SER_RS485_RTS_ON_SEND; rs485conf->flags |= SER_RS485_RTS_AFTER_SEND; } + + port->rs485_de_gpio = devm_gpiod_get_optional(dev, "rs485-de", + GPIOD_OUT_LOW); + if (IS_ERR(port->rs485_de_gpio)) + port->rs485_de_gpio = NULL; } EXPORT_SYMBOL_GPL(uart_get_rs485_mode); diff --git a/kernel/include/linux/serial_core.h b/kernel/include/linux/serial_core.h index 3460b15a26..0e22f057cf 100644 --- a/kernel/include/linux/serial_core.h +++ b/kernel/include/linux/serial_core.h @@ -246,6 +246,7 @@ struct uart_port { int hw_stopped; /* sw-assisted CTS flow state */ unsigned int mctrl; /* current modem ctrl settings */ unsigned int timeout; /* character-based timeout */ + unsigned int frame_time; /* frame timing in ns */ unsigned int type; /* port type */ const struct uart_ops *ops; unsigned int custom_divisor; @@ -261,6 +262,7 @@ struct uart_port { struct attribute_group *attr_group; /* port specific attributes */ const struct attribute_group **tty_groups; /* all attributes (serial core use only) */ struct serial_rs485 rs485; + struct gpio_desc *rs485_de_gpio; /* enable RS485 de */ void *private_data; /* generic platform data pointer */ }; @@ -552,5 +554,5 @@ static inline int uart_handle_break(struct uart_port *port) (cflag) & CRTSCTS || \ !((cflag) & CLOCAL)) -void uart_get_rs485_mode(struct device *dev, struct serial_rs485 *rs485conf); +void uart_get_rs485_mode(struct uart_port *port); #endif /* LINUX_SERIAL_CORE_H */ diff --git a/yocto/meta-tvis-app/recipes/hvgo-tvis/files/hvgo.c b/yocto/meta-tvis-app/recipes/hvgo-tvis/files/hvgo.c index cea061853b..ea4951af35 100755 --- a/yocto/meta-tvis-app/recipes/hvgo-tvis/files/hvgo.c +++ b/yocto/meta-tvis-app/recipes/hvgo-tvis/files/hvgo.c @@ -16,6 +16,8 @@ static version versions[] = { {"V1.05 20240406", "移植QT环境"}, {"V1.06 20240407", "添加魔视模型库"}, {"V1.07 20240425", "1.继承SDK1.3版本; 2. rtsp-server 更新; 3. 有线网卡脚本优化;"}, + {"V1.08 20240430", "修复485+RTC"}, + {"V1.09 20240508", "1. 添加 i2c-tools、can-utils、ifmetric、network-manager等测试工具包; 2. 解决QT界面程序编译报错问题"}, }; /* 获取版本信息说明 */ diff --git a/yocto/meta-tvis-app/recipes/packagegroups/packagegroup-tvis-app.bb b/yocto/meta-tvis-app/recipes/packagegroups/packagegroup-tvis-app.bb index b4bd5d4711..a2818d8610 100755 --- a/yocto/meta-tvis-app/recipes/packagegroups/packagegroup-tvis-app.bb +++ b/yocto/meta-tvis-app/recipes/packagegroups/packagegroup-tvis-app.bb @@ -11,5 +11,4 @@ RDEPENDS:${PN} = "\ netcore-tvis \ opencv-tvis \ rtsp-server-tvis \ - ubuntu-tool-tvis \ " \ No newline at end of file diff --git a/yocto/meta-tvis-app/recipes/ubuntu-tool-tvis/files/canutils/candump b/yocto/meta-tvis-app/recipes/ubuntu-tool-tvis/files/canutils/candump deleted file mode 100755 index 02d31e703ba8d7e896e93124efd5de7495f4b06d..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 30856 zcmeHw4R}=5we~(UNeBu5M2P{(Nk||>0+F9ENvWJn0)dK%VXRiv%w%Sg4EdR4W}<;0 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